philips semiconductors AN100 an overview of data converters december 1991 linear products
philips semiconductors application note AN100 an overview of data converters 2 1991 dec introduction large systems are comprised of many different subsystems, all of which must interface to complete the system. all types of circuits, including linear , digital and discrete, are often used in the subsystems. interface circuits provide the necessary function of tying the parts of a system together . these circuits are usually not purely linear or digital but contain both types of circuit functions. for instance, sense amplifiers are designed for interface between low level memory outputs and bipolar levels, while dif ferential comparators are designed for interface between analog systems and logic systems. converters digital communications, digital instruments and displays have created a demand for low cost reliable converters. key factors in this demand are: ? the need to communicate with digital computers and equipment for processing and storage of analog signals. ? severe limitations encountered in reliable analog data transmission over any considerable distance. ? the need for more easily readable displays. general application areas for converters include: data processing, data transmission, graphics and displays, audio systems, control systems and arithmetic operations. specific applications test systems ? transistor tester (force ib and ic) ? resistor matching ? programmable power supplies ? programmable pulse generators ? programmable current source ? function generators (rom drive) arithmetic operations ? analog division by a digital word ? analog quotient of 2 digital words ? analog product of 2 digital words squaring ? addition and subtraction with analog output ? magnitude comparison of 2 digital words ? digital quotient of 2 analog variables ? arithmetic operations with words from dif ferent logic families graphics and displays ? polar-to-rectangular conversion ? crt character generation ? chart recorder driver ? crt displays data transmission ? modem transmitter ? differential line driver ? party line multiplexing of analog signals ? multilevel 2-wire data transmission ? secure communications (constant power dissipation) control systems ? reference level generator for set-point controllers ? positive peak detector ? negative peak detector ? disc drive head positioner ? microfilm head positioner audio systems ? digital avc and reverberation ? music distribution ? organ tone generator ? audio tracking a/d ? speech compression and expansion ? audio digitizing and decoding notes: output = ref. x digital word output ref. x b 1 2 b 2 4 b n 2 n d/a digital word input analog output ref sl00665 figure 1. conversion of a digitally coded signal input into an analog signal output i 4 8r i 3 4r i 2 2r i 1 r i 0 r f v out + v ref sl00666 figure 2. binary-weighted ladder employing voltage switching
philips semiconductors application note AN100 an overview of data converters 1991 dec 3 dac building blocks the actual implementation of a d/a system contains four separate parts: a reference quantity; a set of binary switches to simulate binary coefficients b 1 . . . b n ; a weighting network; and an output summing means . note: i out i ref x b 1 b 2 2 b 3 4 b 4 8 i 4 i 3 i 2 i 1 r r r v i4 2r 2r 2r 2r i out v bias i ref sl00667 figure 3. r-2r ladder network employing current switching binary-weighted ladder employing voltage switching the disadvantages of a binary-weighted ladder employing voltage switching include: a wide range of resistor values which are used in weighting the network, and nodal capacitances which are charged/discharged during conversion (see figure 2). 1 limit e o settling time 0 t sl00668 figure 4. settling time e o 000 001 010 011 100 101 110 111 digital input d e o all o's d o e 10 8 6 5 4 0 sl00669 figure 5. offset error r-2r ladder network employing current switching the advantages of this type of network include: no need for a wide range of resistor values, and current switching eliminates transients in nodal parasite capacitances (see figure 3). key specifications speed the conversion process should represent the input signal with the highest fidelity and minimal lag in time (real-time applications). d k digital input e o 10 8 6 4 2 000 001 010 011 100 101 110 111 e sl00670 figure 6. gain error nonideal analog output 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 0 0 1 digital input linearity error ideal f.s. sl00671 figure 7. relative accuracy settling time settling time is a measure of a converter's speed and is defined as the elapsed time after a code transition for dac output to reach final value within specified limits, usually lsb (see figure 4). errors offset error the output current or voltage of a dac with zero code input. (see figure 5). offset can and usually is trimmed to zero with an offset zero adjust circuit. gain error deviation in output voltage from correct level when the input calls for a full-scale output. this error may be trimmed to zero (see figure 6). relative accuracy the maximum deviation of the dac output relative to an ideal straight line drawn from zero scale to full-scale (see figure 7). differential non-linearity incremental error from any ideal lsb analog output change when the digital input is changed 1 lsb (see figure 9). monotonicity as the input code is incremented from one code to the next in sequence, the analog output will either increase or remain constant (see figure 9). stability stability is a measure of the independence of converter parameters with respect to variations in external conditions such as temperature and supply voltage.
philips semiconductors application note AN100 an overview of data converters 1991 dec 4 step size error differential nonlinear analog output 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 digital input sl00672 figure 8. differential non-linearity 1/2 lsb diff nonlinear fs 11/2 lsb 11/2 lsb 11/2 lsb diff 1/2 lsb analog output 000 001 010 011 100 101 110 111 digital code sl00673 figure 9. non-monotonic (must be > 1/2 lsb non-linear) temperature coefficient the effects of temperature changes of the output. specified as % full-scale change per degree c. supply rejection ability to resist changes in the output with supply changes, specified as % full-scale change per volt of supply change. long term stability measure of how stable the output is over a long period of time. a/d converter circuits analog-to-digital conversion schemes generally fall into one of three categories: 1. feedback ? counting ? tracking (up-down) ? successive approximation 2. integrating ? single slope ? dual slope ? triple slope 3. parallel (flash) sar ref nbit dac control logic clock start conversion complete n n input comparator + output buffer msb lsb sl00674 figure 10. block diagram of a successive approximation a/d converter the type of converter chosen for a given application depends upon many things; the accuracy required, the conversion speed necessary , the necessary immunity to noise, and cost are some of these considerations. the successive approximation technique is the one most widely used, mainly because of its excellent tradeof fs in resolution, speed, accuracy, and cost. figure 10 shows a simplified block diagram of a successive approximation a/d converter . upon receiving the start signal, the successive approximation register (sar) is cleared and the most significant bit (msb) of that register is set. the sar output is connected to the input of the dac, the output of which is compared with the unknown input. if the input is less than the dac output, the msb is cleared and the next bit is set; if the input is greater than the dac output, the msb is left high and the next bit is set. the input is again compared with the dac output and the second bit cleared or left high, based on the same criteria as for the msb. this process continues until all bits have been determined. the analog input should not change appreciably during the conversion time. if it did change during this time, the converted output would not be a true indication of the analog input. for this reason, it is common practice to use a sample-and-hold circuit at the converter analog input to hold the input value constant during the conversion process. a sample-and-hold circuit is not necessary if the signal at the input of the converter varies slowly enough and has a noise level low enough so that the input will not change a significant amount during the conversion. the allowable input
philips semiconductors application note AN100 an overview of data converters 1991 dec 5 change during this conversion is generally accepted as the value of lsb (for n-bit accuracy). accuracy and speed are determined primarily by the properties of the dac and the comparator . linearity is determined primarily by the linearity of the dac. if the dac is non-monotonic, one or more codes will be missing from the a/d converter 's output range. figure 1 1 is the transfer function of a 3-bit binary coded a/d converter with a 0 to +10v input range. a 3-bit adc is shown for simplicity , but the principle applies to adcs of any resolution. note that there is a lsb of fset at the input such that the first count occurs when the input is equal to lsb. the center of the range for the first step occurs, therefore, when the input is equal to the value of one lsb, and the error at the switch point is limited to lsb. this error is known as the quantization error as it is derived from the smallest input quantity that can be resolved. if an adc has a specified error of lsb maximum, this means that any transition point can be as far as lsb from where it should be. considerations for a/d converters ? analog input signal range and resolution required ? linearity requirement and stability ? conversion speed required ? monotonicity requirement: can missing codes be tolerated? ? character of input signal: is it noisy, sampled, filtered, slowly varying? ? transfer characteristics (type of coding) a/d converter terms resolution resolution is the input change required to increment the output between the two adjacent codes. this term also refers to the number of bits in the output word and, hence, the number of discrete output codes the input analog signal can be broken into. expressed in abitso resolution. transfer characteristic the t ransfer characteristic is the relationship of the output digital word (code) to the input analog signal, i.e., binary , bcd. conversion speed the conversion speed is the speed at which an adc can make repetitive data conversions. quantizing error quantizing error is an inherent error in the conversion process due to finite resolution (discrete output). see figure 12. offset error an offset error is shown in figure 13. gain error a gain error is shown in figure 14. relative accuracy relative accuracy is the deviation of an actual bit transition from the ideal transition value at any level over the range of the adc (% fs). see figure 15. 111 110 101 100 011 010 001 1.25 2.50 3.75 5.00 6.25 7.50 8.75 10.00 output code input voltage sl00675 figure 11. transfer function of an ideal 3-bit adc with a 0 to 10v input range analog output ideal transfer function 10v v (lsb) e in 111 110 101 100 011 010 001 000 1.25 2.5 3.75 5.06.25 7.5 8.75 10 v(1/2 lsb) analog input + 1/2 lsb error function 1/2 lsb sl00676 figure 12. quantizing errors
philips semiconductors application note AN100 an overview of data converters 1991 dec 6 digital output offset error adc with offset perfect adc 111 110 101 100 011 010 001 1 2 3 5 4 6 7 analog input 8 9 e in + 1 lsb error function 1 lsb e e in sl00677 figure 13. offset error digital output input voltage e in low gain perfect adc ideal e 2 high gain 111 110 101 100 011 010 001 000 1 2 3 4 5 6 7 8 9 10 e 1 analog input high gain perfect adc low gain e in e 2 e 1 e + 1 lsb error function 1 lsb sl00678 figure 14. gain error hysteresis error a hysteresis error is the code transition voltage dependence relative to the direction from which the transition is approached. f.s. l.s.b. 1/2 l.s.b. nonideal ideal input digital output 111 110 101 100 011 010 001 1 2 3 5 4 6 7 8 9 000 10 error l.s.b. l.s.b. l.s.b. l.s.b. ideal input linearity plus quantization errors input linearity error sl00679 figure 15. relative accuracy analog input (shows a missing code at 101) digital output 111 110 101 100 011 010 001 1 2 3 5 4 6 7 8 9 e in 10 sl00680 figure 16. missing codes monotonicity monotonicity is when the output code either increases or remains the same for increasing analog input signals. the opposite is true in the reverse direction. missing codes a missing code is a code combination that is skipped. see figure 16.
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